Mark Yoder on DSP and FPGA Technologies
He digressed for a few moments to comment on the Grand Tetons in the background and the two moose which were next to the cabin when he returned one morning. He came back to the line of discussion and spoke about the speakers. Dr. James Truchard’s speech on DSP was LabVIEW-centric. There was one speaker talking about signal processing in the 4-5KHz range used for avalanche detection. Also, there was a history lesson from John Tricolor, on different adaptive filters for which he had an unusual application.
I asked Mark where LabVIEW should go in the future. He likes the current trajectories such as the ability to layout a problem on the PC and then target an FPGA. It would be neat if there were no changes required for the target platform. Mark would like to teach a class that can focus on the tradeoffs between FPGA, host computer, and DSP, and then let the user decide on which platform to use based on the performance, memory size, and reconfigurability.
At Rose-Hulman, they are working on a class for reconfigurable technologies that is now looking at fixed point usage. In this class, Mark is implementing a simple sideband, transmit/receive program. He’s not interested in the sideband, but rather how to implement fixed point and handle it when you have a fixed number of bits to work with, in order to get the best Signal to Noise Ratio out of it.
Mark is also working on Software Defined Radio (SDR). He used a reconfiguration I/O board from NI in a couple of senior design projects. He thought it an intriguing piece of hardware. “The ability to hang a wire out and sample a swath of spectrum is a powerful tool; it’s one thing to talk about equations, but it’s another to actually do it,” he said. The fact that it’s all in one place (generate signal, sample it, demodulate it, and then process it) is a great advantage.
There’s still work to get it going to compile in an FGPA, though. The compile time could be done more quickly, he thought. We’re currently in the “punch card era” with FPGAs due to the relatively long compile times. Some students use remote compiles to get around the problem. With FPGAs you can tell it compile on another machine which can make things run faster, if the machine has more memory. The students simulated an RFID reader and tag. One board ran as a reader and the other as a tag. They were able to get the handshake between the two.
I asked Mark where his research is taking him in the future. If he had time, he would write the ultimate purpose receiver that would go across the entire spectrum. That would make a neat demo.